The WII5 v2 main board. In WII6, the STM32 takes over control and wave processing from the ATmega2560 and Raspberry Pi.
The board
| Role | Part | Purpose |
|---|---|---|
| Main processor | STM32U575 | ST’s ultra-low-power line, five serial ports, 786 kB SRAM for the wave maths, Zephyr support upstream |
| Debug processor | ESP32-S3 on a Seeed XIAO module | WiFi, Bluetooth and a web server, powered down during deployment |
| Motion | chosen per deployment | for example a single-axis Kistler accelerometer or a Sparton AHRS-M2 |
| Satellite | RockBLOCK 9704, Iridium Certus | about 100 kB a message, which is what lets the 2 Hz record travel |
| Position | u-blox GNSS, NMEA | position and time from a single receiver; a dual-antenna model is available for accurate heading near the poles |
| Temperature | DS18B20 probes | temperature measurements for the deployment |
| Power monitoring | INA3221 and INA228 | power and voltage measurements on multiple buses, plus battery monitoring |
| Storage | microSD, or soldered SD NAND for production | full-rate records, 2 Hz records and wave results |
Satellite
The modem is a RockBLOCK 9704, Ground Control’s Iridium Certus modem: messages of up to 100 kB each way through the Iridium network, which is what lets a 2 Hz record travel, and the path for commands and firmware images from shore. The firmware talks to it through rockblock9704-zephyr, a Zephyr module built on Ground Control’s own C library, pinned and unchanged, with the one thread the library needs, a devicetree binding and a shell command. The module is open source under the MIT licence and is shared with Digital Dimensions’ other remote monitoring products. On the bench the modem’s identity and signal have been read through the module; the first message over the network is next, once the account is provisioned.
Power
Power and voltage are measured on multiple buses, alongside battery monitoring, so a deployment can track energy use and the buoy’s health. Switched supplies let the firmware power down peripherals between jobs, and between captures the main processor sleeps in a low-power stop mode.
Duty cycle
Capture length and reporting interval are set for each deployment, from reports every few minutes to once a month.
The power budget depends on time spent sampling, processing and sending data, as well as consumption between wake-ups. Sleep consumption matters most when the buoy spends long periods waiting for its next capture.
Firmware
Zephyr RTOS, with the wave maths as a library that builds and tests the same way on a workstation and on the processor. The bench image is a hardware test suite: each peripheral exercised on its own, with a shell for all of it and a JSON status frame once a second to the dashboard.
Both processors boot through MCUboot. A new image reaches the main processor through the debug processor, runs on trial until its first transmit confirms it, and is reverted by a reset before then. A tampered or unsigned image is refused. The maths library, the card layout, the link protocol and the update path are documented in the engineering repository. Ask us for the documentation if you are planning an integration.